102 lines
3.0 KiB
C
102 lines
3.0 KiB
C
/* Copyright (C) 2011-2022 Free Software Foundation, Inc.
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Contributed by ARM Ltd.
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This file is part of GCC.
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GCC is free software; you can redistribute it and/or modify it
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under the terms of the GNU General Public License as published
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by the Free Software Foundation; either version 3, or (at your
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option) any later version.
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GCC is distributed in the hope that it will be useful, but WITHOUT
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ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
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or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public
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License for more details.
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You should have received a copy of the GNU General Public License
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along with GCC; see the file COPYING3. If not see
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<http://www.gnu.org/licenses/>. */
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/* Definitions for option handling for AArch64. */
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#ifndef GCC_AARCH64_OPTS_H
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#define GCC_AARCH64_OPTS_H
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/* The various cores that implement AArch64. */
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enum aarch64_processor
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{
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#define AARCH64_CORE(NAME, INTERNAL_IDENT, SCHED, ARCH, FLAGS, COSTS, IMP, PART, VARIANT) \
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INTERNAL_IDENT,
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#include "aarch64-cores.def"
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/* Used to indicate that no processor has been specified. */
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generic,
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/* Used to mark the end of the processor table. */
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aarch64_none
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};
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enum aarch64_arch
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{
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#define AARCH64_ARCH(NAME, CORE, ARCH_IDENT, ARCH_REV, FLAGS) \
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AARCH64_ARCH_##ARCH_IDENT,
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#include "aarch64-arches.def"
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aarch64_no_arch
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};
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/* TLS types. */
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enum aarch64_tls_type {
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TLS_TRADITIONAL,
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TLS_DESCRIPTORS
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};
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/* The code model defines the address generation strategy.
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Most have a PIC and non-PIC variant. */
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enum aarch64_code_model {
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/* Static code and data fit within a 1MB region.
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Not fully implemented, mostly treated as SMALL. */
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AARCH64_CMODEL_TINY,
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/* Static code, data and GOT/PLT fit within a 1MB region.
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Not fully implemented, mostly treated as SMALL_PIC. */
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AARCH64_CMODEL_TINY_PIC,
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/* Static code and data fit within a 4GB region.
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The default non-PIC code model. */
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AARCH64_CMODEL_SMALL,
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/* Static code, data and GOT/PLT fit within a 4GB region.
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The default PIC code model. */
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AARCH64_CMODEL_SMALL_PIC,
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/* -fpic for small memory model.
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GOT size to 28KiB (4K*8-4K) or 3580 entries. */
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AARCH64_CMODEL_SMALL_SPIC,
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/* No assumptions about addresses of code and data.
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The PIC variant is not yet implemented. */
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AARCH64_CMODEL_LARGE
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};
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/* Function types -msign-return-address should sign. */
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enum aarch64_function_type {
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/* Don't sign any function. */
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AARCH64_FUNCTION_NONE,
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/* Non-leaf functions. */
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AARCH64_FUNCTION_NON_LEAF,
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/* All functions. */
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AARCH64_FUNCTION_ALL
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};
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/* SVE vector register sizes. */
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enum aarch64_sve_vector_bits_enum {
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SVE_SCALABLE,
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SVE_NOT_IMPLEMENTED = SVE_SCALABLE,
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SVE_128 = 128,
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SVE_256 = 256,
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SVE_512 = 512,
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SVE_1024 = 1024,
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SVE_2048 = 2048
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};
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/* Where to get the canary for the stack protector. */
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enum stack_protector_guard {
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SSP_SYSREG, /* per-thread canary in special system register */
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SSP_GLOBAL /* global canary */
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};
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#endif
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