133 lines
6.1 KiB
HTML
133 lines
6.1 KiB
HTML
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<head>
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<title>Using as: Z80 Opcodes</title>
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<link href="AS-Index.html#AS-Index" rel="index" title="AS Index">
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<link href="index.html#SEC_Contents" rel="contents" title="Table of Contents">
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<link href="Z80_002dDependent.html#Z80_002dDependent" rel="up" title="Z80-Dependent">
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<body lang="en" bgcolor="#FFFFFF" text="#000000" link="#0000FF" vlink="#800080" alink="#FF0000">
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<a name="Z80-Opcodes"></a>
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<div class="header">
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<p>
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Previous: <a href="Z80-Directives.html#Z80-Directives" accesskey="p" rel="previous">Z80 Directives</a>, Up: <a href="Z80_002dDependent.html#Z80_002dDependent" accesskey="u" rel="up">Z80-Dependent</a> [<a href="index.html#SEC_Contents" title="Table of contents" rel="contents">Contents</a>][<a href="AS-Index.html#AS-Index" title="Index" rel="index">Index</a>]</p>
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</div>
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<hr>
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<a name="Opcodes-22"></a>
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<h4 class="subsection">9.56.5 Opcodes</h4>
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<p>In line with common practice, Z80 mnemonics are used for the Z80,
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Z80N, Z180, eZ80, Ascii R800 and the GameBoy Z80.
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</p>
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<p>In many instructions it is possible to use one of the half index
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registers (‘<samp>ixl</samp>’,‘<samp>ixh</samp>’,‘<samp>iyl</samp>’,‘<samp>iyh</samp>’) in stead of an
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8-bit general purpose register. This yields instructions that are
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documented on the eZ80 and the R800, undocumented on the Z80 and
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unsupported on the Z180.
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Similarly <code>in f,(c)</code> is documented on the R800, undocumented on
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the Z80 and unsupported on the Z180 and the eZ80.
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</p>
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<p>The assembler also supports the following undocumented Z80-instructions,
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that have not been adopted in any other instruction set:
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</p><dl compact="compact">
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<dt><code>out (c),0</code></dt>
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<dd><p>Sends zero to the port pointed to by register <code>C</code>.
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</p>
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</dd>
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<dt><code>sli <var>m</var></code></dt>
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<dd><p>Equivalent to <code><var>m</var> = (<var>m</var><<1)+1</code>, the operand <var>m</var> can
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be any operand that is valid for ‘<samp>sla</samp>’. One can use ‘<samp>sll</samp>’ as a
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synonym for ‘<samp>sli</samp>’.
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</p>
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</dd>
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<dt><code><var>op</var> (ix+<var>d</var>), <var>r</var></code></dt>
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<dd><p>This is equivalent to
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</p>
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<div class="example">
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<pre class="example">ld <var>r</var>, (ix+<var>d</var>)
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<var>op</var> <var>r</var>
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ld (ix+<var>d</var>), <var>r</var>
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</pre></div>
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<p>The operation ‘<samp><var>op</var></samp>’ may be any of ‘<samp>res <var>b</var>,</samp>’,
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‘<samp>set <var>b</var>,</samp>’, ‘<samp>rl</samp>’, ‘<samp>rlc</samp>’, ‘<samp>rr</samp>’, ‘<samp>rrc</samp>’,
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‘<samp>sla</samp>’, ‘<samp>sli</samp>’, ‘<samp>sra</samp>’ and ‘<samp>srl</samp>’, and the register
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‘<samp><var>r</var></samp>’ may be any of ‘<samp>a</samp>’, ‘<samp>b</samp>’, ‘<samp>c</samp>’, ‘<samp>d</samp>’,
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‘<samp>e</samp>’, ‘<samp>h</samp>’ and ‘<samp>l</samp>’.
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</p>
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</dd>
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<dt><code><var>op</var> (iy+<var>d</var>), <var>r</var></code></dt>
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<dd><p>As above, but with ‘<samp>iy</samp>’ instead of ‘<samp>ix</samp>’.
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</p></dd>
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</dl>
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<p>The web site at <a href="http://www.z80.info">http://www.z80.info</a> is a good starting place to
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find more information on programming the Z80.
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</p>
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<p>You may enable or disable any of these instructions for any target CPU
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even this instruction is not supported by any real CPU of this type.
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Useful for custom CPU cores.
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</p>
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<hr>
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<div class="header">
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<p>
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Previous: <a href="Z80-Directives.html#Z80-Directives" accesskey="p" rel="previous">Z80 Directives</a>, Up: <a href="Z80_002dDependent.html#Z80_002dDependent" accesskey="u" rel="up">Z80-Dependent</a> [<a href="index.html#SEC_Contents" title="Table of contents" rel="contents">Contents</a>][<a href="AS-Index.html#AS-Index" title="Index" rel="index">Index</a>]</p>
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</div>
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</body>
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